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Editing: intel_rapl_msr
�� 8 8 � (� 4� A� N� _� s� �� �� �� �� ɂ ܂ � � � 5� J� ^� s� �� �� �� �� Ń ҃ � � �� �� � � � &� 1� ;� F� S� `� s� }� �� �� �� �� DŽ ل � �� � � +� >� � O� :� V� @ Z� ( � �� � =� @ � � � 8 � k� |� � � � 6 6� � � ?� � m� �� � �� 9� @ yY @� �' �� �+ \! �+ �- �+ �� , �� , �X B� @, <� �� �U W � � >� ;� �� 6 �� Å @ Q� =� � m� �� � ΅ �_ L @ ޅ � e � � f " Ü J� # � 8 @# � I� �# A� �� U >� x� @ o� � 1� � � � ' 5� �� ~� @ � � !� >� � � E� R� �@ *� H� � 3� H� lE W @ =� W � >� ( G� C� F� A� � � V k @ W� ` W� L � `� T? � @ D� � K� - M� N� o� Z �� � �� N� �� N� Ȇ �� � G� ׆ U� � �� �� � � U� rapl_if_type RAPL_IF_MSR RAPL_IF_MMIO RAPL_IF_TPMI rapl_domain_type RAPL_DOMAIN_PACKAGE RAPL_DOMAIN_PP0 RAPL_DOMAIN_PP1 RAPL_DOMAIN_DRAM RAPL_DOMAIN_PLATFORM RAPL_DOMAIN_MAX rapl_domain_reg_id RAPL_DOMAIN_REG_LIMIT RAPL_DOMAIN_REG_STATUS RAPL_DOMAIN_REG_PERF RAPL_DOMAIN_REG_POLICY RAPL_DOMAIN_REG_INFO RAPL_DOMAIN_REG_PL4 RAPL_DOMAIN_REG_UNIT RAPL_DOMAIN_REG_PL2 RAPL_DOMAIN_REG_MAX rapl_primitives POWER_LIMIT1 POWER_LIMIT2 POWER_LIMIT4 ENERGY_COUNTER FW_LOCK FW_HIGH_LOCK PL1_LOCK PL2_LOCK PL4_LOCK PL1_ENABLE PL1_CLAMP PL2_ENABLE PL2_CLAMP PL4_ENABLE TIME_WINDOW1 TIME_WINDOW2 THERMAL_SPEC_POWER MAX_POWER MIN_POWER MAX_TIME_WINDOW THROTTLED_TIME PRIORITY_LEVEL PSYS_POWER_LIMIT1 PSYS_POWER_LIMIT2 PSYS_PL1_ENABLE PSYS_PL2_ENABLE PSYS_TIME_WINDOW1 PSYS_TIME_WINDOW2 AVERAGE_POWER NR_RAPL_PRIMITIVES rapl_domain_data primitives rapl_power_limit last_power_limit rapl_domain rdd energy_unit time_unit rapl_reg rapl_package nr_domains domain_map power_limit_irq lead_cpu has_pmu pmu_data reg_action rapl_if_priv pcap_rapl_online reg_unit read_raw write_raw rpi rapl_package_pmu_data n_active timer_interval intel_rapl_msr_driver_exit intel_rapl_msr_driver_init rapl_cpu_down_prep rapl_cpu_online rapl_msr_probe rapl_msr_read_raw rapl_msr_remove rapl_msr_update_func rapl_msr_write_raw
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